LOW POWER HIGH SPEED CMOS ADDER

Description

In design of high performance complex arithmetic logic circuits, ground bounce noise, leakage current and leakage power are important and challenging issues in nanometer down scaling. Today leakage reduction is an important task to improve the performance of CMOS circuit with power loss scenario of CMOS. In this Book, the low power and reduce ground bounce noise using 10 transistor full adder, 14 transistor and 4-bit full adder and Carry look ahead adder have been proposed and analysis with various parameter . The objective of book is to provide a clear explanation of the operation of all important low power CMOS Adder. This book has been written in a very simple and lucid manner. The whole text has been logically organized and spreaded in to 11 chapters. This book is also intended as a textbook for the use in PHD and PG Research in Microelectronics and VLSI Design, Nanotechnology, Low Power VLSI .

About the Author

Mr. Raghvendra Singh is currently serving as assistant professor and Research Coordinator at Rama University, Kanpur, Uttar Pradesh, India. He has received the M.Tech. degrees in VLSI DESIGN from Dept. of Electronics Communication Engineering, ITM University, Gwalior, India in 2013. Since then he has contributed significantly in the field of academic and research. He has research experience in DRDO-SSPL, New Delhi and CSIR-CEERI, Pilani Rajasthan. He has awarded two time Young Scientist Fellowship by MPCST Bhopal, Madhya Pradesh. He has successfully organized more than 20 national and international conferences and is Editor’s of many international journal. He has more than 30 papers present and published in various conferences and International journal, like SCOPUS, SCI, UGC, IEEE, and Springer. he has more than 6 patent filed and published .His research interests are in low power VLSI, Nanotechnology, Biosensor, Memory and Analog mixed signal. In addition, he has also organized many national and international workshop and seminars. He has worked as reviewer and part of technical committee in many journal and conference.